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VulkanExample / dep / include / glm / simd / integer.h
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1/// @ref simd
2/// @file glm/simd/integer.h
3
4#pragma once
5
6#if GLM_ARCH & GLM_ARCH_SSE2_BIT
7
8GLM_FUNC_QUALIFIER glm_uvec4 glm_i128_interleave(glm_uvec4 x)
9{
10 glm_uvec4 const Mask4 = _mm_set1_epi32(0x0000FFFF);
11 glm_uvec4 const Mask3 = _mm_set1_epi32(0x00FF00FF);
12 glm_uvec4 const Mask2 = _mm_set1_epi32(0x0F0F0F0F);
13 glm_uvec4 const Mask1 = _mm_set1_epi32(0x33333333);
14 glm_uvec4 const Mask0 = _mm_set1_epi32(0x55555555);
15
16 glm_uvec4 Reg1;
17 glm_uvec4 Reg2;
18
19 // REG1 = x;
20 // REG2 = y;
21 //Reg1 = _mm_unpacklo_epi64(x, y);
22 Reg1 = x;
23
24 //REG1 = ((REG1 << 16) | REG1) & glm::uint64(0x0000FFFF0000FFFF);
25 //REG2 = ((REG2 << 16) | REG2) & glm::uint64(0x0000FFFF0000FFFF);
26 Reg2 = _mm_slli_si128(Reg1, 2);
27 Reg1 = _mm_or_si128(Reg2, Reg1);
28 Reg1 = _mm_and_si128(Reg1, Mask4);
29
30 //REG1 = ((REG1 << 8) | REG1) & glm::uint64(0x00FF00FF00FF00FF);
31 //REG2 = ((REG2 << 8) | REG2) & glm::uint64(0x00FF00FF00FF00FF);
32 Reg2 = _mm_slli_si128(Reg1, 1);
33 Reg1 = _mm_or_si128(Reg2, Reg1);
34 Reg1 = _mm_and_si128(Reg1, Mask3);
35
36 //REG1 = ((REG1 << 4) | REG1) & glm::uint64(0x0F0F0F0F0F0F0F0F);
37 //REG2 = ((REG2 << 4) | REG2) & glm::uint64(0x0F0F0F0F0F0F0F0F);
38 Reg2 = _mm_slli_epi32(Reg1, 4);
39 Reg1 = _mm_or_si128(Reg2, Reg1);
40 Reg1 = _mm_and_si128(Reg1, Mask2);
41
42 //REG1 = ((REG1 << 2) | REG1) & glm::uint64(0x3333333333333333);
43 //REG2 = ((REG2 << 2) | REG2) & glm::uint64(0x3333333333333333);
44 Reg2 = _mm_slli_epi32(Reg1, 2);
45 Reg1 = _mm_or_si128(Reg2, Reg1);
46 Reg1 = _mm_and_si128(Reg1, Mask1);
47
48 //REG1 = ((REG1 << 1) | REG1) & glm::uint64(0x5555555555555555);
49 //REG2 = ((REG2 << 1) | REG2) & glm::uint64(0x5555555555555555);
50 Reg2 = _mm_slli_epi32(Reg1, 1);
51 Reg1 = _mm_or_si128(Reg2, Reg1);
52 Reg1 = _mm_and_si128(Reg1, Mask0);
53
54 //return REG1 | (REG2 << 1);
55 Reg2 = _mm_slli_epi32(Reg1, 1);
56 Reg2 = _mm_srli_si128(Reg2, 8);
57 Reg1 = _mm_or_si128(Reg1, Reg2);
58
59 return Reg1;
60}
61
62GLM_FUNC_QUALIFIER glm_uvec4 glm_i128_interleave2(glm_uvec4 x, glm_uvec4 y)
63{
64 glm_uvec4 const Mask4 = _mm_set1_epi32(0x0000FFFF);
65 glm_uvec4 const Mask3 = _mm_set1_epi32(0x00FF00FF);
66 glm_uvec4 const Mask2 = _mm_set1_epi32(0x0F0F0F0F);
67 glm_uvec4 const Mask1 = _mm_set1_epi32(0x33333333);
68 glm_uvec4 const Mask0 = _mm_set1_epi32(0x55555555);
69
70 glm_uvec4 Reg1;
71 glm_uvec4 Reg2;
72
73 // REG1 = x;
74 // REG2 = y;
75 Reg1 = _mm_unpacklo_epi64(x, y);
76
77 //REG1 = ((REG1 << 16) | REG1) & glm::uint64(0x0000FFFF0000FFFF);
78 //REG2 = ((REG2 << 16) | REG2) & glm::uint64(0x0000FFFF0000FFFF);
79 Reg2 = _mm_slli_si128(Reg1, 2);
80 Reg1 = _mm_or_si128(Reg2, Reg1);
81 Reg1 = _mm_and_si128(Reg1, Mask4);
82
83 //REG1 = ((REG1 << 8) | REG1) & glm::uint64(0x00FF00FF00FF00FF);
84 //REG2 = ((REG2 << 8) | REG2) & glm::uint64(0x00FF00FF00FF00FF);
85 Reg2 = _mm_slli_si128(Reg1, 1);
86 Reg1 = _mm_or_si128(Reg2, Reg1);
87 Reg1 = _mm_and_si128(Reg1, Mask3);
88
89 //REG1 = ((REG1 << 4) | REG1) & glm::uint64(0x0F0F0F0F0F0F0F0F);
90 //REG2 = ((REG2 << 4) | REG2) & glm::uint64(0x0F0F0F0F0F0F0F0F);
91 Reg2 = _mm_slli_epi32(Reg1, 4);
92 Reg1 = _mm_or_si128(Reg2, Reg1);
93 Reg1 = _mm_and_si128(Reg1, Mask2);
94
95 //REG1 = ((REG1 << 2) | REG1) & glm::uint64(0x3333333333333333);
96 //REG2 = ((REG2 << 2) | REG2) & glm::uint64(0x3333333333333333);
97 Reg2 = _mm_slli_epi32(Reg1, 2);
98 Reg1 = _mm_or_si128(Reg2, Reg1);
99 Reg1 = _mm_and_si128(Reg1, Mask1);
100
101 //REG1 = ((REG1 << 1) | REG1) & glm::uint64(0x5555555555555555);
102 //REG2 = ((REG2 << 1) | REG2) & glm::uint64(0x5555555555555555);
103 Reg2 = _mm_slli_epi32(Reg1, 1);
104 Reg1 = _mm_or_si128(Reg2, Reg1);
105 Reg1 = _mm_and_si128(Reg1, Mask0);
106
107 //return REG1 | (REG2 << 1);
108 Reg2 = _mm_slli_epi32(Reg1, 1);
109 Reg2 = _mm_srli_si128(Reg2, 8);
110 Reg1 = _mm_or_si128(Reg1, Reg2);
111
112 return Reg1;
113}
114
115#endif//GLM_ARCH & GLM_ARCH_SSE2_BIT